# LSTM-Style Looped Transformers with Shared KV Caches

Authors: Andreas Kirsch.

Adds an LSTM-style gated memory across transformer loops and shares one KV cache across the recurrent core. Aligns cache entries from two training passes with a consistency loss to reduce the mismatch during autoregressive decoding.

First public: 2026-10-23.
ArXiv initial submission: 2026-10-23.

[Original paper](https://arxiv.org/abs/2610.33360) · [PDF](https://arxiv.org/pdf/2610.33360) · [HTML](https://arxiv.org/html/2610.33360v1) · [Reading-list entry](https://latent-implicit-thinking.github.io/papers/2610.33360/)
[Preprint BibTeX](https://latent-implicit-thinking.github.io/papers/2610.33360/citation.bib) · [Preprint CSL-JSON](https://latent-implicit-thinking.github.io/papers/2610.33360/citation.csl.json) · [JSON record](https://latent-implicit-thinking.github.io/papers/2610.33360/record.json)

## Approaches

- [Recurrent reasoning](https://latent-implicit-thinking.github.io/topics/recurrent-reasoning/): Repeat parts of the model or keep intermediate information in memory while working through a problem. Some methods also learn how many passes to run.

Reading-list version 0.12.0; literature checked through 2026-11-02.